SSRLabs - Technology Advisory Board

SSRLabs relies on internal and external sources for determining the feasibility and applicability of new ideas for its products and its engineering methods. These sources are - among others - our Technology Advisers, each of them luminaries in their industries. We are proud to announce world class members of our Technology Advisory Board.

Axel Kloth

Axel Kloth is SSRLabs' CEO and acting CTO. He is the inventor of the architecture of the coprocessor chipset. Axel has 25 years of experience in parallel processing and in ASIC design. Being a physicist by training, he knows how to optimize the math, the logic and the instruction- and energy-efficiency of each individual core while at the same time optimizing the performance of the system of massively parallel cores, leaving the many-integrated-core (MIC) architectures of any of the competitors in the dust. He knows what is needed for moderately and massively parallel processors to be instruction- and energy-efficient while providing nearly linear scaling of performance with the number of cores. Axel is an industry luminary, having shown that the seemingly impossible can be done if an alleged problem is properly rethought. In his position as the CTO Axel chairs SSRLabs' TAB which meets quarterly, and makes sure that the TAB helps SSRLabs identify the best and broadest deployment of its hardware and software solutions, improve upon the processes to make these products available, and in general assures that the company and its products remain relevant

John Gustafson

Dr. John Gustafson was most recently Chief Product Architect at AMD, and before that Director of Extreme Technologies Research at Intel. He has held CEO and CTO positions at numerous publicly-traded and private companies, but is perhaps best known as the inventor of the "scaled speedup" model that is now taught in universities as "Gustafson's Law". Publication of that law in the late 1980s, together with a series of examples of thousand-fold performance increase on 1024 processors, created a watershed in the acceptance of highly parallel architectures as a viable approach. He introduced the first commodity cluster design almost thirty years ago, and most recently has invented a new way to store numbers on a computer that is more power-efficient and more accurate yet uses less storage than conventional floating-point. His Wikipedia page lists some of his honors and accomplishments, including the inaugural Gordon Bell Award, IEEE Computer Society Golden Core Award, ISU Inventor of the Year Award, and three R&D 100 Awards. He is an honors graduate of Caltech, with MS and PhD degrees from Iowa State University.

Stanley Mazor

Stan Mazor first joined Fairchild Semiconductor and then year-old Intel Corporation working under Ted Hoff on the Busicom calculator project, designing the first microprocessor. Mazor assisted in its architecture and wrote software for the Intel 4004. He was a co-developer of Intel's popular 8080 CPU. Stan then began teaching in Intel's Technical Training group. Later he taught microcomputer courses at Stanford University and several other universities. Stan worked on circuit analysis programs and logic simulation at both Fairchild and Intel, and that led him to join a CAD start-up. Following the CAD route, he joined Synopsys. Writing from his experience, he published a book about VHDL and logic synthesis. His honors include: SFSU Wall of Fame, SIA Robert Noyce Award, PC Magazine lifetime achievement award, Kyoto Prize, Inventors Hall of Fame, Ron Brown American Innovator Award and in 2009 the Fellow of the Computer History Museum. In 2010, Stan was awarded the National Medal of Science and Technology by President Obama. Wikipedia lists Stan Mazor's accomplishments.

Nick Tredennick

Nick Tredennick is the architect of the Motorola 68000 and the Nx686 at NexGen, which ultimately became the AMD K6 and helped AMD compete effectively against Intel's Pentium-family processors and their successors. He focused on energy-efficiency and instruction-efficiency, with these terms not even being defined when he performed his research and executed his designs. Ever since, he focused on reconfigurable computing, which can be implemented in FPGAs, or in SSRLabs' coprocessors without the need for FPGA development tools. Nick Tredennick's Wikipedia page highlights his accomplishments.

John Wharton

John Wharton, as an Applications Engineer at Intel, defined the architecture of the 8051 microcontroller, the highest-volume, longest-lived, and most widely-copied processor in Intel history. Since 1980 at least 60 alternate vendors have developed more than 1,000 software-compatible variations of the 8051, and the numbers keep growing. John has worked in the embedded computer industry for more than 30 years, the last 25 as a free-lance design consultant and technology analyst. From 1989 until 2003 John was a Lecturer in Computer Science and E.E. at Stanford University. He was a founding member of the Editorial Advisory Board of Microprocessor Report newsletter, and for eight years contributed articles, wrote a monthly column, and served as the newsletter's chief processor architecture critic. John is an alumnus of Yale and Northwestern University, from which he received a B.S. degree in Electrical Engineering and M.S. in Computer Science. His research interests include everything involving embedded processors.